A quick update.

Last week I did some more research on the components required to build my detector. Gigabit Ethernet was deemed too slow, so I have to go with 10G. The issue is that now I'm pushing the limits of the FPGA, and so I'm going to have to be extremely careful when it comes to programming, due to the fact that the internal component timing is on the order of my data stream. 

After an absurdly large thanksgiving dinner, I'm going to hit the sack. There is simply too much turkey and stuffing inside me right now for me to go on.