Today there was more talk about going back to Arizona in August,
likely right before classes start. We've got someone going down to
align T1, and I'd really like to contribute.

I'm slowly making progress in my understanding of the Xilinx EDK (for
the FPGA stuff). In a nutshell, I'm trying to install a Linux-based
web server on this ML402 board that will allow me to read out data
from the rate counters (which also need to be designed but that's the
'easy' part). All this combined will allow me to plug into one of the
telescopes (likely starting with the Whipple 10m for debugging
purposes) and take data read out to a computer.

The ML402 board I'm using has 64MB of DDR SDRAM. Assuming 20% of that
will be taken up by the operating system, I'm hoping that the
remaining 50MB is enough space to contain the data. The idea is that
even though we'll be reading in values very quickly (microsecond
timespans) if we have a large memory buffer we can read off of
periodically at a high speed. In other words, the computer can't read
and store data on a microsecond timespan, but is able to read and
store a large amount of data every second or so, say.