If Jimmy cracks corn, and no one cares, why do I have a song about it stuck in my head?
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Start of what should be a good week.

So, as I alluded to on Saturday night, Friday I managed to get my firmware and software running on my FPGA, and got it to talk to my PC. A big issue was the communications interface between the FPGA board and my PC.

Communication is attained by writing text to a serial port on the FPGA board and then that signal is read into a PC using Hyperterminal. Here, the problem was two-fold. Firstly, we needed what is known as a null-modem adapter, a gadget which essentially takes the recieve and transmit pins on the connector and swaps them (so transmit on one device points to recieve on the other, and vice versa). The second was that one of my USB ports wasn't supplying enough power to the serial adapter in order for these signals to be read in (which was a real pain to debug considering I've been able to power things off it before). Anyways, it's done now, the hard part, that is. 

Right now, I'm just going to clean up the data acquisition software at which point I'm going to see if I can get the Ethernet running, a daunting task for sure, but at least now I've a proof-of-concept to work from.

I need only write gigabit ethernet drivers now, and if I am lucky the default drivers will work fine.
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It took two weeks, but now we have a slow (RS232) detector at my disposal. I am so excited.
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I forgot to mention that I managed to complete my prototype detector yesterday. More to come on this.
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Incredibly productive week.

So, this week I noticed a huge bug in my FPGA compiling code. In a nutshell, it was removing the fact that my firmware was looking at 7 pins (corresponding to the 7 pixels of my camera) due to a typo I had made in the firmware code (literally, I forgot the word 'in' in two spots), and the firmware compiler didn't mind this, it figured it out on its own, but the higher level compiler for the embedded processing part of it.

That's fixed, and now I'm updating my netbook with the same compiler version as the powerhouse I've been using to make the bitstreams for the FPGA. Once that's done, I should be able to run downstairs and do a low-speed test (readout over Serial connection). That'll be my proof-of-concept.

Today is also the day of the Physics Department's talent show (ie, mostly good music, free beer). "The Redshift Blues Band", comprised of my supervisor (David Hanna on drums), the Chair of the department (Charles Gale), and the Dean of Science (Martin Grant). They are fantastic musicians, and so it'll definitely be a great end to the day.

Fairly certain this isn't true.

In an attempt to rescue my failed file server, I came across this gem.